The present invention relates to a semiconductor device including an AD converter for inverter controlling.
A conventional microcomputer for inverter controlling includes, as shown in FIG. 12, a CPU 1a, a ROM 1b, a RAM 1c, a timer 1d, a serial communication circuit 1e, an I/O port 1f, two AD converters 1g and 1b, a PWM signal generation circuit 1i and the like.
In general, the PWM signal generation circuit 1i used for inverter controlling generates a three-phase PWM (Pulse Width Modulation) signal as shown in FIG. 13. This signal is composed of a PWM signal of three phases, that is, a U-phase, a V-phase and a W-phase respectively having different duties, and an inverted signal of three phases, that is, a /U-phase, a N-phase and a /W-phase. Between the two corresponding phases (namely, between the U-phase and the /U-phase, the V-phase and the N-phase or the W-phase and the /W-phase), a predetermined time at which neither of these two phases are ON (i.e., a dead time) is provided.
A variety of configurations of the PWM signal generation circuit 1i are known, and the circuit generally includes a counter, a comparator and the like. An exemplified configuration is shown in FIG. 14. In the configuration shown in FIG. 14, the PWM signal generation circuit includes a counter 3, a carrier set resistor 4 for storing the maximum count value (carrier set value) of the counter 3, and a comparator 5 for comparing a current count value of the counter 3 with the carrier set value. As shown in FIG. 13, when the current count value of the counter 3 accords with the carrier set value or 0 (zero), the comparator 5 inverts the operation of the counter 3 from an up-counting operation to a down-counting operation or vice versa.
The PWM signal generation circuit 1i of FIG. 14 further includes a phase circuit 6u. Although merely the phase circuit 6u for the U-phase is shown in FIG. 14, phase circuits having the same configuration are provided with respect to the V-phase and the W-phase. The phase circuit 6u includes a duty set resistor 7u for storing a duty set value U shown in FIG. 13, a comparator 8u for comparing the count value of the counter 3 with the duty set value U stored in the duty set resistor 7u, a flip-flop circuit 9u for inverting the PWM signal between the U-phase and the /U-phase in response to a signal supplied from the comparator 8u when the count value of the counter 3 accords with the duty set value U, and a dead time inserting circuit 10u for inserting the dead time between the U-phase and the /U-phase of the PWM signal.
The microcomputer 1 for inverter controlling including this PWM signal generation circuit 1i is used for controlling an inverter device for driving a motor M, for example, as shown in FIG. 15. Specifically in FIG. 15, the microcomputer 1 for inverter controlling outputs the six phases of the PWM signal generated by the PWM signal generation circuit 1i included therein to corresponding driving transistors 15u, 15/u, 15v, 15/v, 15w and 15/w via the I/O port if of FIG. 12, so as to control the rotating rate and the like of the motor M. For this control, the various states of the motor M, such as the position of a rotor, the value of a current supplied to the motor M and the voltage value of the current, are measured with sensors 16 and 17 for successively changing the duty set value stored in the duty set resistor (7u for the U-phase) of each phase in accordance with the measured values, so as to finely determine the pulse width of each phase of the PWM signal.
Accordingly, it is indispensable for fine control of the motor M to precisely measure the current value and the like with the sensors 16 and 17. In the case where the current supplied to the motor M is measured by using the sensor 16 or 17, timing for starting AD conversion with the AD converter 1g or 1h included in the microcomputer 1 for inverter controlling of the value measured by using the sensor 16 or 17 is significant. Conventionally, in order to subject the output value of the sensor 16 or 17 resulting from measuring the supplied current value of the motor M to the AD conversion, a microcomputer for inverter controlling having a function to automatically start the AD conversion in synchronization with the count value of the counter 3 periodically at given intervals as shown in FIG. 16 is also generally used. The configuration of an AD converter included in the microcomputer having such a function is shown in FIG. 17.
FIG. 17 is a block diagram for showing the internal configuration of, for example, the AD converter 1g shown in FIG. 12. In FIG. 17, a register ADCTR1ga is an AD conversion control register for controlling the AD conversion. In this register ADCTR1ga, a bit ADST (i.e., the 7th bit) controls the start of the AD conversion, and when this bit value is changed from xe2x80x9c0xe2x80x9d to xe2x80x9c1xe2x80x9d, an analog-digital conversion circuit 1gb is operated for starting the AD conversion. Other bits for controlling the AD conversion are allocated to the other bits 0 through 6 of the register ADCTR1ga. In this configuration, either a write signal from the CPU or a signal corresponding detection of underflow or overflow of the counter 3 is selected as a signal for setting the value of the bit ADST in FIG. 17. In the case where the detection signal for the underflow or overflow of the counter 3 is selected, the AD conversion is started at the timing of the underflow or overflow of FIG. 13 in synchronization with the underflow or overflow.
The present inventors have examined at what timing the current value of the motor should be measured. In the case where the six-phase PWM signal is used, current flow to the motor M is different among time periods A, B, C and D of FIG. 13 because the ON/OFF combinations of the three phases, i.e., the U-phase, the V-phase and the W-phase, of the PWM signal are different among these three periods. For example, in the time period B, the U-phase and the W-phase of the PWM signal are OFF and the V-phase of the PWM signal is ON, and hence, a current from the V-phase to the U-phase and W-phase flows to the motor M. On the other hand, in the time period C, the U-phase and the V-phase of the PWM signal are ON and the W-phase of the PWM signal is OFF, and hence, a current from the U-phase and V-phase to the W-phase flows to the motor M. Accordingly, in order to finely measure the current value of the motor M, it is desired to measure it in one or a plurality of the time periods A, B, C and D at which a current flows to the motor M differently.
In the conventional microcomputer for inverter controlling, when the measured current value of the motor M is to be subjected to the AD conversion in at least one of the time periods A, B, C and D, it is necessary to control the start of the AD conversion by using the CPU 1a. For this control by using the CPU 1a, the following three software interruption processing are necessary: Processing for measuring start timing of the AD conversion (which is specifically processing for starting the timer at the underflow of the counter 3); AD conversion start processing (namely, processing for setting the bit ADST of the AD conversion control register ADCTR1ga to xe2x80x9c1xe2x80x9d); and processing for obtaining an AD conversion value. There recently is a trend in using merely one microcomputer for simultaneously performing not only the motor control but also other control such as power control and system control. Therefore, any of the three interruption processing may be delayed due to the priority level in the control. In such a case, the start timing for the AD conversion can be shifted, so that a precise current value cannot be obtained. On the other hand, when the three interruption processing are priorly performed, there arises a problem that other control such as the system control may be delayed.
An object of the invention is, in a semiconductor device for inverter controlling including a PWM signal generation circuit, definitely starting AD conversion of a value measured with a sensor at desired start timing.
In order to achieve the object, according to the invention, the AD conversion of a value measured with a sensor is definitely started at desired start timing by using a hardware device.
Specifically, the semiconductor device for inverter controlling of this invention includes a PWM signal generation circuit including a counter and a duty set resistor for generating a multi-phase PWM signal; an AD converter for converting an input analog signal into a digital signal, a pulse width of the PWM signal generated by the PWM signal generation circuit being controlled on the basis of the digital signal obtained through AD conversion by the AD converter; timer means for automatically start counting time in response to a signal supplied from the counter when the counter has a given count value; and AD conversion start factor generating means for generating an AD conversion start factor for activating the AD converter at a time of a particular ON/OFF combination of the PWM signal when the timer means has counted a set timer period.
In one aspect of the semiconductor device for inverter controlling of the invention, the AD converter is plural in number, and the AD conversion start factor is generated by the AD conversion start factor generating means at each of the time of the particular ON/OFF combination of the PWM signal and a time of at least another particular ON/OFF combination of the PWM signal.
In another aspect of the semiconductor device for inverter controlling of the invention, the timer period of the timer means is calculated on the basis of a duty set value set in the duty set resister, and the AD conversion start factor generating means includes timer period storing means for storing the calculated timer period of the timer means.
In another aspect of the semiconductor device for inverter controlling of the invention, the AD conversion start factor generating means includes the timer means and the timer period storing means respectively in number the same as that of the AD converters, and each of the timer means generates the AD conversion start factor to be output to the corresponding one of the AD converters when the timer means has counted the timer period stored in the corresponding one of the timer period storing means.
In another aspect of the semiconductor device for inverter controlling of the invention, in the AD conversion start factor generating means, the number of the timer means is one and the number of the timer period storage means is the same as that of the AD converters, the AD conversion start factor generating means further includes comparing means in number the same as that of the timer period storing means, and each of the comparing means compares the timer period stored in the corresponding one of the timer period storing means with a count value of the timer means, and generates the AD conversion start factor to be output to the corresponding one of the AD converters when the timer period and the count value compared accord with each other.
In another aspect, the semiconductor device for inverter controlling of the invention further includes original timer means, and the original timer means works as the timer means of the AD conversion start factor generating means.
In another aspect of the semiconductor device for inverter controlling of the invention, in the AD conversion start factor generating means, the number of the timer period storing means is the same as that of the AD converters, the AD conversion start factor generating means further includes comparing means in number the same as that of and correspondingly to the timer period storing means, and each of the comparing means compares the count value of the counter for generating a PWM signal included in the PWM signal generation circuit with the timer period stored in the corresponding one of the timer period storing means, and generates the AD conversion start factor to be output to the corresponding one of the AD converters when the count value and the timer period compared accord with each other.
In another aspect, the semiconductor device for inverter controlling of the invention further includes a CPU, and the CPU calculates the timer period stored in the timer period storing means on the basis of the duty set value set in the duty set resister.
In another aspect, the semiconductor device for inverter controlling the invention further includes timer period setting means that receives, from the duty set resistor included in the PWM signal generation circuit, a signal corresponding to the duty set value set in the duty set resistor, determines the timer period of the timer means on the basis of the duty set value, and stores the timer period in the timer period storing means.
Alternatively, the semiconductor device for inverter controlling of this invention includes a PWM signal generation circuit including a counter, a duty set resistor and a dead time inserting circuit for generating a multi-phase PWM signal; an AD converter for converting an input analog signal into a digital signal, a pulse width of the PWM signal generated by the PWM signal generation circuit being controlled on the basis of the digital signal obtained through AD conversion by the AD converter, and a dead time being inserted into an identical phase of the PWM signal generated by the PWM signal generation circuit; delay inserting means that receives an output of the dead time inserting circuit and generates an AD conversion start factor to be output to the AD converter when a set time period has elapsed from insertion of the dead time.
As a result, according to the invention, when the counter for generating a PWM signal ends, for example, a down-counting operation, the timer means receives an underflow signal from the counter in the AD conversion start factor generating means, so as to automatically start the time count. Thereafter, when the set timer period has been counted, an AD conversion start factor is generated so as to activate the AD converter. Therefore, when the set timer period of the timer means is set to a desired time of a specified ON/OFF combination of the multi-phase PWM signal, the AD conversion of a value measured with a sensor can be started at a desired timing. Accordingly, the measured value of the sensor can be precisely obtained. In addition, since there is no need to perform interruption processing such as timer start processing and AD conversion start processing after counting a predetermined time, the burden of the CPU can be reduced, so that delay in other controls such as temperature control performed by the CPU can be effectively suppressed.
In particular, when a plurality of AD converters are used in this invention, a desired plurality of timer periods of the timer means can be set. Accordingly, since the AD conversions respectively performed by the plural AD converters can be independently started, even when the start timing of the AD conversions are very close to each other, the respective AD conversions can be started definitely at the respective start timings.
Furthermore, since the number of timer means additionally provided in this invention can be limited to one, cost reduction and downsizing can be realized.
In addition, since the counter for generating a PWM signal can be used also as the timer means additionally provided in this invention, there is no need to separately provide the timer means.
Moreover, according to the invention, when the duty set value is set in the duty set resistor of the PWM signal generation circuit, the timer period setting means automatically sets the timer period of the timer means on the basis of the duty set value. Therefore, the burden of the CPU can be further reduced as compared with the case where the CPU sets the timer period.
Alternatively, the invention utilizes the fact that when a dead time is inserted into the same phase of the PWM signal by the dead time inserting circuit, the ON/OFF combinations of the respective phases of the PWM signal obtained after the insertion are changed and different from those obtained before the insertion. As a result, an AD conversion start factor is generated by the delay inserting means after a set time has elapsed from the insertion of the dead time, so that the AD converter can be activated at this time point. Therefore, when the set time (delay time) of the delay inserting means is set to a desired time, a value measured with a sensor can be automatically subjected to the AD conversion without using the CPU at a time of an arbitrary ON/OFF combination of the PWM signal.